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Four Character 5.0 mm (0.2 inch) Smart 5 x 7 Alphanumeric Displays Technical Data
HDLX-2416 Series
Features
* Enhanced Drop-in Replacement to HPDL-2416 * Smart Alphanumeric Display Built-in RAM, ASCII Decoder, and LED Drive Circuitry * CMOS IC for Low Power Consumption * Software Controlled Dimming Levels and Blank * 128 ASCII Character Set * End-Stackable * Categorized for Luminous Intensity; Yellow and Green Categorized for Color * Low Power and Sunlight Viewable AlGaAs Versions * Wide Operating Temperature Range -40C to +85C * Excellent ESD Protection * Wide Viewing Angle (50 typ)
Description
These are 5.0 mm (0.2 inch) four character 5 x 7 dot matrix displays driven by an on-board CMOS IC. These displays are pin for pin compatible with the HPDL-2416. The IC stores and decodes 7 bit ASCII data and displays it using a 5 x 7 font. Multiplexing circuitry, and drivers are also part of the IC. The IC has fast setup and hold times which makes it easy to interface to a microprocessor.
Absolute Maximum Ratings
Supply Voltage, VDD to Ground[1] ..................................... -0.5 V to 7.0 V Input Voltage, Any Pin to Ground .......................... -0.5 V to VDD + 0.5 V Free Air Operating Temperature Range, TA ................ -40C to +85C Storage Temperature, TS ........................................ -40C to 100C CMOS IC Junction Temperature, TJ (IC) ................................... +150C Relative Humidity (non-condensing) at 65C ................................... 85% Wave Solder Temperature, 1.59 mm (0.063 in.) below Body ............................. 250C for 3 secs ESD Protection, R = 1.5 k, C = 100 pF ............. VZ = 2 kV (each pin)
Note: 1. Maximum Voltage is with no LEDs illuminated.
Devices:
Standard Red HDLR-2416 AlGaAs Red HDLS-2416 HDLU-2416 High Efficiency Red HDLO-2416 Orange HDLA-2416 Yellow HDLY-2416 Green HDLG-2416
ESD WARNING: STANDARD CMOS HANDLING PRECAUTIONS SHOULD BE OBSERVED WITH THE HDLX-2416
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The address and data inputs can be directly connected to the microprocessor address and data buses. The HDLX-2416 has several enhancements over the HPDL2416. These features include an expanded character set, internal 8 level dimming control, external dimming capability, and individual digit blanking. Finally, the extended functions can be
disabled which allows the HDLX2416 to operate exactly like an HPDL-2416 by disabling all of the enhancements except the expanded character set. The difference between the sunlight viewable HDLS-2416 and the low power HDLU-2416 occurs at power-on or at the default brightness level. Following power up, the HDLS-2416 operates at the 100% brightness level, while
the HDLU-2416 operates at the 27% brightness level. Power on sets the internal brightness control (bits 3-5) in the control register to binary code (000). For the HDLS-2416 binary code (000) corresponds to a 100% brightness level, and for the HDLU-2416 binary code (000) corresponds to a 27% brightness level. The other seven brightness levels are identical for both parts.
Package Dimensions
Pin No. 1 2 3 4 5 6 7 8 9
Function CE1 Chip Enable CE2 Chip Enable CLR Clear CUE Cursor Enable CU Cursor Select WR Write A1 Address Input A0 Address Input VDD
Pin No. 10 11 12 13 14 15 16 17 18
Function GND D0 Data Input D1 Data Input D2 Data Input D3 Data Input D6 Data Input D5 Data Input D4 Data Input BL Display Blank
Notes: 1. Unless otherwise specified, the tolerance on all dimensions is 0.254 mm ( 0.010") 2. All dimensions are in mm/inches. 3. For yellow and green displays only.
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Character Set
NOTES: 1 = HIGH LEVEL 0 = LOW LEVEL
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Recommended Operating Conditions
Parameter Supply Voltage Symbol VDD Min. 4.5 Typ. 5.0 Max. 5.5 Unit V
Electrical Characteristics over Operating Temperature Range
4.5 < VDD < 5.5 V (unless otherwise specified) All Devices Parameter IDD Blank Input Current Input Voltage High Input Voltage Low Symbol IDD (blnk) II VIH VIL -40 2.0 GND Min. 25C[1] Typ. Max. 1.0 Max. 4.0 10 VDD 0.8 Units mA A V V Test Conditions All Digits Blanked VIN = 0 V to VDD VDD = 5.0 V
HDLO/HDLA/HDLY/HDLG-2416 Parameter IDD 4 digits 20 dots/character[2, 3] IDD Cursor all dots ON @ 50% HDLS/HDLU-2416 Part Number HDLS-2416 HDLU-2416 HDLS-2416 HDLU-2416 HDLR-2416 Parameter IDD 4 digits 20 dots/character[2,3] IDD Cursor all dots ON @ 50% Symbol IDD (#) IDD(CU) Min. 25C[1] Typ. Max. 125 105 146 124 Max. 180 154 Units mA mA Test Conditions "#" ON in all four locations Cursor ON in all four locations IDD Cursor all dots ON @ 50% Parameter IDD 4 digits 20 dots/character[2,3] Symbol IDD(#) 25C[1] Typ. Max. Max. 125 34 146 42 124 36 180 52 154 45 mA Four cursors ON in all four locations Units mA Test Conditions Four "#" ON in all four locations Symbol IDD(#) IDD (CU) Min. 25C[1] Typ. Max. 110 92 130 110 Max. 160 135 Units mA mA Test Conditions "#" ON in all four locations Cursor ON in all four locations
IDD(CU)
105 29
Notes: 1. VDD = 5.0 V 2. Average IDD measured at full brightness. Peak IDD = 28/15 x Average IDD(#). 3. IDD(#) max. = 130 mA for HDLO/HDLA/HDLY/HDLG-2416, 146 mA for HDLR/HDLS-2416, and 42 mA for HDLU-2416 at default brightness, 150C IC junction temperature and VDD = 5.5 V.
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Optical Characteristics at 25C[1]
VDD = 5.0 V at Full Brightness
HDLR-2416 Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength
[2]
Symbol IV
Min. 0.5
Typ. 1.1
Units mcd
Test Conditions ''*'' illuminated in all four digits. 19 dots ON
PEAK d
655 640
nm nm
HDLS/HDLU-2416 Part Number HDLS-2416 HDLU-2416 All Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength[2] Symbol IV Min. 4.0 1.2 PEAK d Typ. 12.7 3.1 645 637 Units mcd mcd nm nm Test Conditions ''*'' illuminated in all four digits, 19 dots ON per digit.
HDLO-2416 Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength HDLA-2416 Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength HDLY-2416 Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength
[2] [2] [2]
Symbol IV
Min. 1.2
Typ. 3.5
Units mcd
Test Conditions ''*'' illuminated in all four digits. 19 dots ON
PEAK d
635 626
nm nm
Symbol IV
Min. 1.2
Typ. 3.5
Units mcd
Test Conditions ''*'' illuminated in all four digits. 19 dots ON
PEAK d
600 602
nm nm
Symbol IV
Min. 1.2
Typ. 3.7
Units mcd
Test Conditions ''*'' illuminated in all four digits. 19 dots ON
PEAK d
583 585
nm nm
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HDLG-2416 Parameter Average Luminous Intensity per digit, Character Average Peak Wavelength Dominant Wavelength[2] Symbol IV Min. 1.2 Typ. 5.6 Units mcd Test Conditions ''*'' illuminated in all four digits. 19 dots ON
PEAK d
568 574
nm nm
Notes: 1. Refers to the initial case temperature of the device immediately prior to the light measurement. 2. Dominant wavelength, d, is derived from the CIE chromaticity diagram, and represents the single wavelength which defines the color of the device.
AC Timing Characteristics over Operating Temperature Range at VDD = 4.5 V
Parameter Address Setup Address Hold Data Setup Data Hold Chip Enable Setup Chip Enable Hold Write Time Clear Clear Disable Symbol tAS tAH tDS tDH tCES tCEH tW tCLR tCLRD Min 10 40 50 40 0 0 75 10 1 Units ns ns ns ns ns ns ns s s
Timing Diagram
Enlarged Character Font
Notes: 1. Unless otherwise specified the tolerance on all dimensions is 0.254 mm (0.010") 2. Dimensions are in mm (inches).
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Electrical Description
Pin Function Chip Enable (CE1 and CE2, pins 1 and 2) Clear (CLR, pin 3) Description CE1 and CE2 must be a logic 0 to write to the display.
Display Internal Block Diagram
Figure 1 shows the HDLX-2416 display internal block diagram. The CMOS IC consists of a 4 x 7 Character RAM, a 2 x 4 Attribute RAM, a 5 bit Control Register, a 128 character ASCII decoder and the refresh circuitry necessary to synchronize the decoding and driving of four 5 x 7 dot matrix displays. Four 7 bit ASCII words are stored in the Character RAM. The IC reads the ASCII data and decodes it via the 128 character ASCII decoder. The ASCII decoder includes the 64 character set of the HPDL-2416, 32 lower case ASCII symbols, and 32 foreign language symbols. A 5 bit word is stored in the Control Register. Three fields within the Control Register provide an 8 level brightness control, master blank, and extended functions disable. For each display digit location, two bits are stored in the Attribute RAM. One bit is used to enable a cursor character at each digit location. A second bit is used to individually disable the blanking features at each digit location. The display is blanked and dimmed through an internal blanking input on the row drivers. Logic within the IC allows the user to dim the display either through the BL input or through the brightness control in the control register. Similarly the display can be blanked through the BL input, the Master Blank in the Control Register, or the Digit Blank Disable in the Attribute RAM.
When CLR is a logic 0 the ASCII RAM is reset to 20hex (space) and the Control Register/ Attribute RAM is reset to 00hex. CUE determines whether the IC displays the ASCII or the Cursor memory. (1 = Cursor, 0 = ASCII). CU determines whether data is stored in the ASCII RAM or the Attribute RAM/Control Register. (1 = ASCII, 0 = Attribute RAM/Control Register). WR must be a logic 0 to store data in the display. A0-A1 selects a specific location in the display memory. Address 00 accesses the far right display location. Address 11 accesses the far left location. D0-D6 are used to specify the input data for the display.
Cursor Enable (CUE pin 4)
Cursor Select (CU, pin 5)
Write (WR, pin 6) Address Inputs (A1 and A0, pins 8 and 7) Data Inputs (D0-D6, pins 11-17) VDD (pin 9) GND (pin 10) Blanking Input (BL, pin 18)
VDD is the positive power supply input. GND is the display ground.
BL is used to flash the display, blank the display or to dim the display.
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Figure 1. Internal Block Diagram
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Display Clear
Data stored in the Character RAM, Control Register, and Attribute RAM will be cleared if the clear (CLR) is held low for a minimum of 10 s. Note that the display will be cleared regardless of the state of the chip enables (CE1, CE2). After the display is cleared, the ASCII code for a space (20hex) is loaded into all character RAM locations and 00hex is loaded into all Attribute RAM/Control Register memory locations.
Data Entry
Figure 2 shows a truth table for the HDLX-2416 display. Setting the chip enables (CE1, CE2) to logic 0 and the cursor select (CU) to logic 1 will enable ASCII data loading. When cursor select (CU)
CUE 0 1 X BL 1 1 X CLR 1 1 X 0 X X X X CE1 CE2 WR CU
is set to logic 0, data will be loaded into the Control Register and Attribute RAM. Address inputs A0-A1 are used to select the digit location in the display. Data inputs D0-D6 are used to load information into the display. Data will be latched into the display on the rising edge of the WR signal. D0-D6, A0-A1, CE1, CE2, and CU must be held stable during the write cycle to ensure that correct data is stored into the display. Data can be loaded into the display in any order. Note that when A0 and A1 are logic 0, data is stored in the right most display location.
1 has been stored in the Digit Cursor memory in the Attribute RAM. The cursor consists of all 35 dots ON at half brightness. A flashing cursor can be displayed by pulsing CUE. When CUE is a logic 0, the ASCII data stored in the Character RAM will be displayed regardless of the Digit Cursor bits.
Blanking
Blanking of the display is controlled through the BL input, the Control Register and Attribute RAM. The user can achieve a variety of functions by using these controls in different combinations, such as full hardware display blank, software blank, blanking of individual characters, and synchronized flashing of individual characters or entire display (by
D1 D0 Function Display ASCII Display Stored Cursor
Cursor
When cursor enable (CUE) is a logic 1, a cursor will be displayed in all digit locations where a logic
A1 A0 D6 D5 D4 D3 D2
X
X
X
X
X
X
X
X Reset RAMs Blank Display but do not reset RAMS and Control Register
X
0
1 Extended Functions Disable 0= Enable D1-D5 1= Disable D1-D5 D0 Always Enabled Intensity Control Master Blank Digit Blank Disable 0 Digit Blank Disable 1 Digit Blank Disable 2 Digiit Blank Disable 3 Digit 0 ASCII Data (Right Most Character) Digit 1 ASCII Data Digit Cursor 0 Digit Cursor 1 Digit Cursor 2 Digit Cursor 3
0
0
0
Write to Attribute RAM and Control Register
0
0
1
X
X
1
0
0
0 0 1 0
000 = 100%* 001 = 60% 010 = 40% 011 = 27% 100 = 17% 101 = 10% 110 = 7% 111 = 3%
0= Display ON 1= Display Blanked
DBDn = 0, Allows Digit n to be blanked DBDn = 1 Prevents Digit n from being blanked. DCn = 0 Removes cursor from Digit n DCn = 1 Stores cursor at Digit n
0
1
1
1 1 X X 1 0 0 0 1 1 1 X X 1 X X X 1 X X X 1 X
0 0 1 1
0 1 0 1
Write to Character RAM Digit 2 ASCII Data Digit 3 ASCII Data (Left Most Character)
X
X
X
X
X
X
X
X
X
No Change
0 = Logic 0; 1 = Logic 1; X = Do Not Care; * 000 = 27% for HDLU-2416 Figure 2. Display Truth Table
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strobing the blank input). All of these blanking modes affect only the output drivers, maintaining the contents and write capability of the internal RAMs and Control Register, so that normal loading of RAMs and Control Register can take place even with the display blanked. Figure 3 shows how the Extended Function Disable (bit D6 of the Control Register), Master Blank (bit D2 of the Control Register), Digit Blank Disable (bit D1 of the Attribute RAM), and BL input can be used to blank the display. When the Extended Function Disable is a logic 1, the display can be blanked only with the BL input. When the Extended Function Disable is a logic 0, the display can be blanked through the BL input, the Master Blank, and the Digit Blank Disable. The entire display will be blanked if either the BL input is logic 0 or the Master Blank is logic 1, providing all Digit Blank Disable bits are logic 0. Those digits with Digit Blank Disable bits a logic 1 will ignore both blank signals and remain ON. The Digit Blank Disable bits allow individual characters to be blanked or flashed in synchronization with the BL input.
EFD 0 0 0 0 0 1 1
MB 0 0 X 1 1 X X
DBDn 0 X 1 0 1 X X
BL 0 1 0 X 1 0 1 Display Blanked by BL Display ON Display Blanked by BL. Individual characters "ON" based on "1" being stored in DBDn Display Blanked by MB Display Blanked by MB. Individual characters "ON" based on "1" being stored in DBDn Display Blanked by BL Display ON
Figure 3. Display Blanking Truth Table
Dimming
Dimming of the display is controlled through either the BL input or the Control Register. A pulse width modulated signal can be applied to the BL input to dim the display. A three bit word in the Control Register generates an internal pulse width modulated signal to dim the display. The internal dimming feature is enabled only if the Extended Function Disable is a logic 0.
Bits 3-5 in the Control Register provide internal brightness control. These bits are interpreted as a three bit binary code, with code (000) corresponding to the maximum brightness and code (111) to the minimum brightness. In addition to varying the display brightness, bits 3-5 also vary the average value of IDD. IDD can be specified at any brightness level as shown in Table 1.
Table 1. Current Requirements at Different Brightness Levels Symbol IDD(#) D5 D4 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 D3 0 1 0 1 0 1 0 1 Brightness 100% 60% 40% 27% 17% 10% 7% 3% 25C Typ. 110 66 45 30 20 12 9 4 25C Max. 130 79 53 37 24 15 11 6 Max. over Temp. 160 98 66 46 31 20 15 9 Units mA mA mA mA mA mA mA mA
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Mechanical and Electrical Considerations
The HDLX-2416 is an 18 pin DIP package that can be stacked horizontally and vertically to create arrays of any size. The HDLX-2416 is designed to operate continuously from -40C to + 85C for all possible input conditions. The HDLX-2416 is assembled by die attaching and wire bonding 140 LEDs and a CMOS IC to a high temperature printed circuit board. A polycarbonate lens is placed over the PC board creating an air gap environment for the LED wire bonds. Backfill epoxy environmentally seals the display package. This package construction makes the display highly tolerant to temperature cycling and allows wave soldering. The inputs to the CMOS IC are protected against static discharge and input current latchup. However, for best results standard CMOS handling precautions should be used. Prior to use, the HDLX-2416 should be stored in anti-static tubes or conductive material. During assembly a grounded conductive work area should be used, and assembly personnel should wear conductive wrist straps. Lab coats made of synthetic material should be avoided since they are prone to static charge build-up. Input current latchup is caused when the CMOS inputs are subjected either to a voltage below ground (Vin < ground) or to a voltage higher than VDD (Vin > VDD) and when a high current is forced into the input. To prevent input current latchup and ESD damage, unused inputs should be
connected either to ground or to VDD. Voltages should not be applied to the inputs until VDD has been applied to the display. Transient input voltages should be eliminated.
Soldering and Post Solder Cleaning Instructions for the HDLX-2416
The HDLX-2416 may be hand soldered or wave soldered with SN63 solder. When hand soldering it is recommended that an electronically temperature controlled and securely grounded soldering iron be used. For best results, the iron tip temperature should be set at 315C (600F). For wave soldering, a rosin-based RMA flux can be used. The solder wave temperature should be set at 245C 5C (473F 9F), and dwell in the wave should be set between 1 1/2 to 3 seconds for optimum soldering. The preheat temperature should not exceed 110C (230F) as measured on the solder side of the PC board. For further information on soldering and post solder cleaning, see Application Note 1027, Soldering LED Components.
Figure 4. Intensity Modulation Control Using an Astable Multivibrator (reprinted with permission from Electronics magazine, Sept. 19, 1974, VNU Business pub. Inc.)
Figure 4 shows a circuit designed to dim the display from 98% to 2% by pulse width modulating the BL input. A logarithmic or a linear potentiometer may be used to adjust the display intensity. However, a logarithmic potentiometer matches the response of the human eye and therefore provides better resolution at low intensities. The circuit frequency should be designed to operate at 10 kHz or higher. Lower frequencies may cause the display to flicker.
Extended Function Disable
Extended Function Disable (bit D6 of the Control Register) disables the extended blanking and dimming functions in the HDLX-2416. If the Extended Function Disable is a logic 1, the internal brightness control, Master Blank, and Digit Blank Disable bits are ignored. However the BL input and Cursor control are still active. This allows downward compatibility to the HPDL-2416.
Contrast Enhancement
The objective of contrast enhancement is to provide good readability in the end user's ambient lighting conditions. The concept is to employ both luminance and chrominance contrast techniques. These enhance readability by having the OFF-dots blend into the display background and the ONdots vividly stand out against the same background. For additional information on contrast enhancement, see Application Note 1015.
Intensity Bin Limits for HDLR-2416
Bin A B C D E Intensity Range (mcd) Min. Max. 0.54 0.90 0.74 1.31 0.93 1.42 1.16 1.77 1.45 2.21
Color Bin Limits
Color Yellow Bin 3 4 5 6 1 2 3 4 Color Range (nm) Min. Max. 581.5 585.0 584.0 587.5 586.5 590.0 589.0 592.5 576.0 580.0 573.0 577.0 570.0 574.0 567.0 571.5
Green
Note: Test conditions as specified in Optical Characteristic table.
Intensity Bin Limits for HDLS-2416
Bin E F G H I J Intensity Range (mcd) Min. Max. 3.97 6.79 5.55 9.50 7.78 13.30 10.88 18.62 15.24 26.07 21.33 36.49
Note: Test conditions as specified in Optical Characteristic table.
Note: Test conditions as specified in Optical Characteristic table.
Intensity Bin Limits for HDLX-2416
Bin A B C D E F G Intensity Range (mcd) Min. Max. 1.20 1.77 1.25 2.47 2.02 3.46 2.83 4.85 3.97 6.79 5.55 9.50 7.78 13.30
www.agilent.com/semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152 (Domestic/International), or 0120-61-1280 (Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright (c) 2004 Agilent Technologies, Inc. Obsoletes 5964-6380E July 14, 2004 5988-3269EN
Note: Test conditions as specified in Optical Characteristic table.

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